On a.m. 9:30, May 16th, Prof. Hans Jürgen Mattausch from Hiroshima University in Japan gave a report named “High-performance parallel processing and artificial intelligence systems based on functional memories” and “HiSIM family of compact integrated-device models for circuit simulation” in the Lecture Hall of ISE (fourth floor). Associate Prof. Wang Yong hosted the report. Junior and senior undergraduates majoring in integratedcircuit , part of the postgraduate students and relevant teachers listened to the report.

During the report, Prof. Hans Jürgen Mattausch firstly briefly introduced recent developments in the field of integrated circuit. And then, aiming at the problem of slow memory data transmission in the general processor, he introduced in details the circuit storage solutions with stratified design and parallel processing created by the joint efforts of Hiroshima University and the Japanese company. This technology can speedup the mass data processing and thus could have a great application prospect in fields like pattern recognition, motion detection, target tracking and other fields.

After that Prof. Hans Jürgen Mattausch introduced the HiSIM transistor model developed by the Semiconductor Technology Research Center of Hiroshima University used for circuit simulation. Deduced from the semiconductor’s surface potential equation, the model can simulate devices such as the long or short channel MOS tube, IGBT, PowerMOS and SOI through iterative algorithm. At present, HiSIM has been applied successfully to the circuit simulation device of the main EDA suppliers such as Synopsys, Cadence, Mentor graphics, etc.

After the report, Prof. Mattausch patiently answered questions of the audience. The whole report lasted two and a half hours. Many students said that they benefited a lot from the report.